Electronics I Laboratory - EXPERIMENT 10

Common Emitter Amplifier

Objectives:

1. To understand the operational characteristics of a common emitter (CE) amplifier.
2. To be able determine the maximum output available from a basic CE amplifier.
3. To examine the effect of adding an emitter bypass capacitor to the amplifier circuit.
4. To understand how input impedance can be measured.
5. To determine the Thévenin equivalent of the amplifier output circuit.

Parts and Equipment:

Transistor: 2N2222, b = 180 typical
Resistors: 18 k W,  2 @ 1.8 k W, 1.5kW,  1.0 k W, 68 W, and 18 W.
Capacitors: 100mF, 10mF, and 1mF.
DC power supply
Signal Generator
Oscilloscope
Digital multimeter
Breadboard and wire

Textbook Reference:

Hambley, Allan R., "Electronics," 2^nd Ed. Prentice Hall, 2000, pp.248-258
Serda and Smith, "Microelectronic Circuits," 4th Ed.  Oxford University Press, New York, NY, 1998, pp. 280-288
Savant, Roden, and Carpenter, "Electronic Design," The Benjamin/Cummings Publishing Company, Inc., Redwood City, CA, 1991, pp. 79-89, 213-226.

Procedure 1: Biasing Characteristics

Construct the circuit shown in Fig. 1. using the following values:

C1 = 1mF,   R1 = 1.5 kW,    R2 = 18 kW,    R_L = 1.8 kW
C2 = 10mF,    R_C = 1.8 kW,    R_E1 = 18 W,  R_E2 = 68 W,  V_CC = +14 V.  The bypass capacitor, C_E, will not be used for the first set of measurements.

Pin Connections
 

1. With no ac signal input to the circuit, measure all the DC node voltages  V_CC, V_C, V_B, & V_E and calculate the actual Q-point current, I_CQ = (V_CC - V_C)/ R_C, and voltage V_CEQ = V_C - V_E.

Perform all of the remaining procedures without the 100 µF bypass capacitor connected in parallel with the lower emitter resistor, R_E2 , and then repeated all of them with the bypass capacitor.  With the bypass capacitor it may be necessary to use an external voltage divider to reduce the signal generator output to a level small enough to avoid distortion in the amplifier.

 Procedure 2: Frequency Response:

1. Set the signal generator at 2 KHz. Connect an oscilloscope to observe the input signal, v_s, and the output signal, v_o, and increase the input signal amplitude (V_s) until clipping is observed. Then reduce the input until the maximum output voltage that contains no sign of distortion is found. 

2. Next record the input voltage at which the effects of saturation and cutoff are first seen on the output.  For this circuit saturation effects will be seen as clipping at the bottom of the waveform and cutoff effects will be seen as clipping or distortion at the top of the waveform.

3. Reduce the input level to about half the value that first caused distortion.  Then measure and record the ac input and output voltages V_in  and V_out.     Use the  Oscilloscope for these measurements since our DMMs are not accurate at the higher frequencies to be used.  Also measure the period, T, and the Dt between the rising edge zero crossings of V_in  and V_out.  Then calculate the voltage gain, A_v = V_out/V_in, and the  phase shift, q = 360Dt /T, at each of the following frequencies: 20, 50, 100, 200, 500, 1000, 2000, 10k, and 100k Hz.  Record the actual measured value of each frequency.   Make sure there is no sign of distortion or clipping on the output waveform before each measurement.  The gain should be almost 10 at the higher frequencies without the bypass capacitor and about 30 to 40 with the bypass capacitor across R_E2.  The phase angles should range from about -50 degrees to about -180 degrees.

 Procedure 3: Input Impedance:

1. Insert a 1 kOhm resistor in series with the signal generator and set the frequency at 2 kHz. Measure the voltages. Then remove the resistor and measure its actual value. Use these measurements to calculate R_in.  Make sure there is no distortion in the output voltage before making these measurements.   R_in should be higher without the bypass.

Procedure 4: Thévenin Equivalent:

1. Using no series resistor, connect the circuit as in procedure 2, and set the signal generator at 2 kHz.   First remove the load resistor and adjust the input signal so there is no sign of distortion in the output waveform.   This is the open circuit output voltage.  Measure V_{out open circuit}.

2. Reinsert R_L and re-measure V_out making sure no change has been made to V_in.   The measurement with R_L removed gives you the open circuit voltage, A_voV_in, which when divided by V_in gives the open circuit voltage gain, A_vo.  The measurement with R_L connected allows you to calculate the output resistance, by applying voltage division to the output circuit in the model above and using the measured load resistance and two measured voltages, with the output open, V_{out open circuit} = A_vo V_in, and with load connected, V_out. = A_vV_in. 

CALCULATIONS / GRAPHS:
From Procedure 1:

1.  Calculate all the DC currents in the circuit.  Then calculate the power DC power dissipated in each resistor and the power supplied by the battery.

From Procedure 2:

1. Calculate the voltage gain, A_V = V_Out/V_in, at each test frequency.  Convert the gain to dB using the following equation. Gain (dB) = 20 log₁₀ (V_out / V_in) = 20 log₁₀ (A_V).  Plot a graph of voltage gain(dB) vs. frequency for both circuits. Use log scaling for the frequency (x-axis).  This graph of gain in dB plotted with the logarithmic frequency scale is the standard way of plotting frequency  responses when the frequency range is over a decade wide.  If you do not know how to change the x-axis to log scale follow this link.  Use  solid black lines for the major grid lines and dotted or dashed black lines for the minor grid lines on the log scale.

2. From the graph created in the previous step, determine the mid-band gain for each circuit.   This will be where the gain levels off in the frequency range above 1 kHz.  Then determine the lower cutoff frequency.   This is the frequency where the gain drops 3dB below the mid-band gain.  Make sure you plot the graph large enough to get an accurate estimate of this frequency.  You will also need to turn on the minor grid lines for the frequency scale to be able to accurately make this estimate.   In this experiment the highest frequencies should be in the mid-band range.  How does the circuit with the bypass capacitor across R_E2 compare to the circuit without the bypass capacitor?

3. Plot a semi-log graph of phase angle vs. frequency for both circuits.  How does the phase shift compare between the two circuits?  What is the approximate phase shift at the lower cutoff frequency of each circuit?

4. Using the DC voltage measurements and calculated currents draw a graph of the DC load line for the collector emitter loop, I_C = (V_CC-V_CE)/(R_C + R_{E total}).  Mark the Q-point (DC operation point) on this load line.  Draw the ac load line through the Q-point at a slope of -1/R_ac, where R_ac = R_L||R_C + the un-bypassed part of R_E.  From this graph you can determine the theoretical maximum undistorted output swing available from this circuit.  Look at the voltage difference between V_CEQ and the saturation voltage (approx. 0.3 V) and the difference between V_CEQ and the cutoff voltage (where the ac load line crosses the V_CE axis) .  The maximum symmetrical peak to peak voltage swing will be approximately twice the minimum of these two differences.  Compare this value with the experimental results.  Remember V_p-p = 2*sqrt(2)*V_rms

5. Run a Micro-Cap analysis of the circuit using the measured component values.  Save the numeric output from the ac analysis to a file and import it into your spreadsheet.  Plot this data on a graph with  your experimental data.  Plot the Micro-Cap curve as a line with NO SYMBOLS and the experimental data as SYMBOLS WITH NO LINE.  Do this for both the gain vs frequency graph and the phase vs frequency graph.  Show both forms of the amplifier on each graph.  How close was your experimental data to the Micro-Cap simulation?  Include the Micro-Cap circuit and the Micro-Cap graphs in your report. 

From Procedure 3:

6.  How does the input impedance compare between the two amplifiers?  You can check the input impedance using Micro-Cap using mag(v(a))/mag(I(a,b)) where a is the node number where the ac source connects to C₂ and b is the node number where C₂ connects to the base of the transistor.  The value of this function is R_in = V_in / I_in.  How close is the value at 2 kHz?  It should be close to your experimental results, but will vary slightly with the b of the transistor.

From Procedure 4:

7. Determine the Thévenin equivalent circuit of each amplifier output.  NOTE: From the Thévenin equivalent of the output

,  Solve for R_out 

Small Signal Mid-Band Model of the Amplifier

How do the two equivalents compare?

Questions:

You may need to consult your text book for the answers to some of these questions.

1. Explain how the input signal is amplified and why it is inverted at the output.

2. Explain the purpose of the two capacitors, C1 and C2.

3. Why is it important that the two capacitors must have their positive terminal toward the transistor?

4. Why does the emitter bypass capacitor increase the voltage gain?

5. Why does the bypass capacitor decrease the input impedance?

6. What effect does the bypass capacitor have on the output impedance of the amplifier and why?

Conclusions:

What can you say about the common emitter amplifier characteristics as a result of this experiment?

This page last updated 02/06/2006